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Fix TENPU row-parallel LoRA input sizing - #255

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hjh0119 merged 1 commit into
modelscope:mainfrom
addsubmuldiv:fix-tenpu-row-lora-input-size
Nov 6, 2026
Merged

hjh0119 merged 1 commit into
modelscope:mainfrom
addsubmuldiv:fix-tenpu-row-lora-input-size

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@addsubmuldiv

@addsubmuldiv addsubmuldiv commented Nov 4, 2026 •

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Summary

Fix TP-sharded LoRA A construction for TENPU row-parallel linears. PEFT reads a local in_features from TENPU, so pass the reconstructed global width to the constructor and let TENPU shard it once. Retain the native RowParallelLinear branch, where PEFT reads the global input_size.

- row_input_size = self.in_features if native_row or is_torch_npu_available() else in_features
+ row_input_size = self.in_features if native_row else in_features

Add a TP=1/2 regression test for CUDA and NPU that compares forward output, input gradients, and LoRA A/B gradients against an unsharded matrix reference.

Evidence

  • Before: With global input width 2048 and TP=2, TENPU LoRA A was built with weight shape [8, 512] for a local input width of 1024, failing with GEMM not possible.
  • After: NPU TP=1 and TP=2 numerical tests pass with rtol=0, atol=0 for forward output and input/LoRA A/B gradients: 2 passed, 2 deselected (pytest tests/test_lora_row_parallel.py -k npu -q -s).
  • Qwen3-0.6B TP=2 all-linear LoRA SFT completes 4 optimizer steps on a local 32-record dataset and saves Megatron and safetensors adapter checkpoints. Final loss: 2.34315753; gradient norm: 5.59919882. All 196 zero-initialized LoRA B tensors are nonzero after training.
  • Runtime validation used 2 Ascend 910B3 NPUs, CANN 9.2.0, torch 2.10.0, torch_npu 2.10.0.post4, Megatron Core 0.18.3, and TENPU 2.17.1. Pre-commit checks pass.
  • CUDA and older MindSpeed stacks were not executed. MoE, sequence parallelism, long training, and checkpoint resume are outside this validation.

Copilot AI balanced review requested due to automatic review settings November 4, 2026 12:18

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🟢 Approval recommended

No active review issues were identified for the TENPU row-parallel LoRA input-sizing fix.

No open issues 🎉

What changed in this PR

Fixes TENPU row-parallel LoRA A construction by passing the global input width, preventing it from being sharded twice while preserving native-row and CUDA sizing behavior.

Changes:

  • Removes the NPU-specific input-size override and clarifies the constructor’s sizing expectations.
  • Adds CUDA/NPU regression tests for TP=1 and TP=2, comparing outputs and input/LoRA gradients against an unsharded reference.
File Description
tests/​test_lora_row_parallel.py Adds sharded LoRA shape, forward-output, and gradient checks.
src/​mcore_bridge/​tuners/​lora.py Corrects TENPU LoRA A input sizing while retaining native-row handling.

Review effort: Balanced

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3 participants